PIC16F877A
Author: Molnár Károly

All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size ROM
size EEPROM
size Common
SFRs
Features Configuration Bits RAM map SFR map

PIC16F877A
CONFIG (address:0x2007, mask:0x2FCF, default:0x2FCF)
FOSC -- Oscillator Selection bits (bitmask:0x0003)
FOSC = LP | 0x3FFC | LP oscillator.
FOSC = XT | 0x3FFD | XT oscillator.
FOSC = HS | 0x3FFE | HS oscillator.
FOSC = EXTRC | 0x3FFF | RC oscillator.
WDTE -- Watchdog Timer Enable bit (bitmask:0x0004)
WDTE = OFF | 0x3FFB | WDT disabled.
WDTE = ON | 0x3FFF | WDT enabled.
PWRTE -- Power-up Timer Enable bit (bitmask:0x0008)
PWRTE = ON | 0x3FF7 | PWRT enabled.
PWRTE = OFF | 0x3FFF | PWRT disabled.
BOREN -- Brown-out Reset Enable bit (bitmask:0x0040)
BOREN = OFF | 0x3FBF | BOR disabled.
BOREN = ON | 0x3FFF | BOR enabled.
LVP -- Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit (bitmask:0x0080)
LVP = OFF | 0x3F7F | RB3 is digital I/O, HV on MCLR must be used for programming.
LVP = ON | 0x3FFF | RB3/PGM pin has PGM function; low-voltage programming enabled.
CPD -- Data EEPROM Memory Code Protection bit (bitmask:0x0100)
CPD = ON | 0x3EFF | Data EEPROM code-protected.
CPD = OFF | 0x3FFF | Data EEPROM code protection off.
WRT -- Flash Program Memory Write Enable bits (bitmask:0x0600)
WRT = HALF | 0x39FF | 0000h to 0FFFh write-protected; 1000h to 1FFFh may be written to by EECON control.
WRT = 1FOURTH | 0x3BFF | 0000h to 07FFh write-protected; 0800h to 1FFFh may be written to by EECON control.
WRT = 256 | 0x3DFF | 0000h to 00FFh write-protected; 0100h to 1FFFh may be written to by EECON control.
WRT = OFF | 0x3FFF | Write protection off; all program memory may be written to by EECON control.
DEBUG -- In-Circuit Debugger Mode bit (bitmask:0x0800)
DEBUG = ON | 0x37FF | In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
DEBUG = OFF | 0x3FFF | In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
CP -- Flash Program Memory Code Protection bit (bitmask:0x2000)
CP = ON | 0x1FFF | All program memory code-protected.
CP = OFF | 0x3FFF | Code protection off.

This page generated automatically by the device-help.pl program (2014-09-27 07:53:46 UTC) from the 8bit_device.info file (rev: 1.21) of mpasmx and from the gputils source package (rev: svn 1103). The mpasmx is included in the MPLAB X.