PIC12F519
Author: Molnár Károly

All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size ROM
size EEPROM
size Common
SFRs
Features Configuration Bits RAM map SFR map

PIC12F519
CONFIG (address:0x0FFF, mask:0x007F, default:0x007F)
FOSC -- Oscillator Selection bits (bitmask:0x0003)
FOSC = LP | 0x0FFC | LP Osc With 18 ms DRT.
FOSC = XT | 0x0FFD | XT Osc With 18 ms DRT.
FOSC = INTRC | 0x0FFE | INTRC With 1 ms DRT.
FOSC = EXTRC | 0x0FFF | EXTRC With 1 ms DRT.
WDTE -- Watchdog Timer Enable bit (bitmask:0x0004)
WDTE = OFF | 0x0FFB | Disabled.
WDTE = ON | 0x0FFF | Enabled.
CP -- Code Protection bit (bitmask:0x0008)
CP = ON | 0x0FF7 | Code protection on.
CP = OFF | 0x0FFF | Code protection off.
MCLRE -- Master Clear Enable bit (bitmask:0x0010)
MCLRE = OFF | 0x0FEF | RB3/MCLR Functions as RB3.
MCLRE = ON | 0x0FFF | RB3/MCLR Functions as MCLR.
IOSCFS -- Internal Oscillator Frequency Select bit (bitmask:0x0020)
IOSCFS = 4MHz | 0x0FDF | 4 MHz INTOSC Speed.
IOSCFS = 8MHz | 0x0FFF | 8 MHz INTOSC Speed.
CPDF -- Code Protection bit - Flash Data Memory (bitmask:0x0040)
CPDF = ON | 0x0FBF | Code protection on.
CPDF = OFF | 0x0FFF | Code protection off.

This page generated automatically by the device-help.pl program (2016-01-02 14:08:22 UTC) from the 8bit_device.info file (rev: 1.27) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.